Dr. Michael Orshansky

From the University of Texas at Austin, Austin, TX

Biographical sketch

Mike Orshansky is Assistant Professor in the Electrical and Computer Engineering Dept of the University of Texas at Austin. He received his undergraduate and PhD degrees from UC Berkeley. Prior to joining UT/Austin in 2003, he was a visiting Research Scientist at the Gigascale System Research Center and a Lecturer at UC Berkeley. He has also won an NSF CAREER Award and the Best Paper Award at DAC2005.

His research interests center on Design and CAD algorithms for manufacturability and yield improvement in the presence of process variability, in low-power circuit design, and in semiconductor device modelling.

The research he will describe today focuses on the problem of producing ICs which function correctly when manufacturing tolerances cannot be controlled accurately enough. It describes an optimization strategy which unifies design-time gate--level sizing and post-silicon adaptation using adaptive body bias at the chip level.