Technology Member Organisations

APS CAS CS EDS MMT-S SSCS

Dr. Subhasish Mitra

From the Dept. of EECS, Stanford University, USA.

Author

Sung-Boem Park, Subhasish Mitra, Stanford University, Palo Alto, CA, USA

Abstract

IFRA, an acronym for Instruction Footprint Recording and Analysis, overcomes major challenges associated with a very expensive step in post-silicon validation of processors - pinpointing the bug location and the instruction sequence that exposes the bug (also called exposing stimulus) from a system failure such as a crash. Major benefits of IFRA over traditional techniques for post-silicon bug localization are: 1. It does not require full system-level reproduction of bugs, and, 2. It does not require full system-level simulation. Hence, it can overcome major hurdles that limit the scalability of traditional post-silicon validation methodologies. Results on a complex super-scalar processor demonstrate that IFRA is effective in accurately localizing electrical bugs with very little impact on overall chip area.

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